NTU
M.S. Student · Graduate Institute of Electronics Engineering, ICS Group
ONLINE
~/john-wei · ntu.eecs
Jui-Chiang
Wei
魏睿強 · M.S. @ NTU · Efficient AI systems, model compression & hardware-aware ML
I am a master's student in Electronics Engineering at National Taiwan University, advised by Prof. An-Yeu (Andy) Wu in the Access IC Design Lab. I build efficient AI systems across post-training quantization, Mamba-based models, and accelerator-aware optimization.
// 02 trajectory 04 nodes
Academia Sinica
Research Intern · TinyML, sustainable AI & efficient deployment
NTU
B.S. Student · Department of Electrical Engineering
NCTU
B.S. Student · Department of Electrical Engineering
// 03 publications 04 entries
Research focus
My work asks how we can make advanced models more practical: smaller, faster, and aware of the systems that run them. I am especially interested in efficient vision models, post-training quantization, Mamba architectures, and AI accelerators.
model compressionquantizationMambaIC designvision modelsefficient AI
ICIP · 2026 NEW
HyQuant: A Unified Quantization Framework for Hybrid Mamba–Transformer Vision Models
A systematic post-training quantization framework for hybrid vision architectures including MambaVision and VSSD.
ASRU · 2025
Multi-Distillation from Speech and Music Representation Models
A multi-teacher framework for unifying speech and music representations in one compact model.
Interspeech · 2025
Distilling a Speech and Music Encoder with Task Arithmetic
A task-arithmetic distillation approach for combining independent speech and music encoders.
ICLR · 2024
Dynamic-SUPERB Phase-2
A collaboratively expanding benchmark for measuring spoken-language models across 180 tasks.
// 04 selected projects 03 entries
Multi-Core GEMM Accelerator
A multi-core accelerator with distributed memory, AXI data movement, and controller-managed scheduling across processing elements.
AcceleratorRTLAXI
ViT Patch Embedding Accelerator
A Vision Transformer patch-embedding accelerator with INT8 quantization, memory access, and clock-domain-crossing synchronization.
VisionINT8Hardware
BCH Decoder
A BCH decoder supporting hard- and soft-decision decoding, Berlekamp error-location computation, and Chase decoding.
Coding TheoryDigital Design
// 05 contact